An Analog Visual Pre-Processing Processor Employing Cyclic Line Access in Only-Nearest-Neighbor-Interconnects Architecture

Part of Advances in Neural Information Processing Systems 18 (NIPS 2005)

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Yusuke Nakashita, Yoshio Mita, Tadashi Shibata


An analog focal-plane processor having a 128128 photodiode array has been developed for directional edge filtering. It can perform 44-pixel kernel convolution for entire pixels only with 256 steps of simple ana- log processing. Newly developed cyclic line access and row-parallel processing scheme in conjunction with the “only-nearest-neighbor in- terconnects” architecture has enabled a very simple implementation. A proof-of-concept chip was fabricated in a 0.35-(cid:0)m 2-poly 3-metal CMOS technology and the edge filtering at a rate of 200 frames/sec. has been experimentally demonstrated.